PIC16C622 Microcontroller
The PIC16C622 device has enhanced core features, eight-level deep stack, and multiple internal and external interrupt sources. The separate instruction and data buses of the Harvard architecture allow a 14-bit wide instruction word with the separate 8-bit wide data. The two-stage instruction pipeline allows all instructions to execute in a single cycle, except for program branches (which require two cycles). A total of 35 instructions (reduced instruction set) are available. Additionally, a large register set gives some of the architectural innovations used to achieve a very high performance. PIC16C622 micro controllers typically achieve a 2:1 code compression and a 4:1 speed improvement over other 8-bit micro controllers in their class.
PIC16C622A-04/P
The PIC16C62X devices are 18 and 20-Pin ROM/
EPROM-based members of the versatile PICmicro?
family of low cost, high performance, CMOS, fullystatic, 8-bit microcontrollers.
All PICmicro microcontrollers employ an advanced
RISC architecture. The PIC16C62X devices have
enhanced core features, eight-level deep stack, and
multiple internal and external interrupt sources. The
separate instruction and data buses of the Harvard
architecture allow a 14-bit wide instruction word with
the separate 8-bit wide data. The two-stage instruction
pipeline allows all instructions to execute in a single
cycle, except for program branches (which require two
cycles). A total of 35 instructions (reduced instruction
set) are available. Additionally, a large register set
gives some of the architectural innovations used to
achieve a very high performance.
PIC16C63 Microcontroller
The PIC16C63A devices are low cost, high performance, CMOS, fully-static, 8-bit microcontrollers in the PIC16CXX mid-range family. All PIC? microcontrollers employ an advanced RISC architecture. The PIC16CXX microcontroller family has enhanced core features, eight-level deep stack and multiple internal and external interrupt sources. The separate instruction and data buses of the Harvard architecture allow a 14-bit wide instruction word with the separate 8-bit wide data. The two stage instruction pipeline allows all instructions to execute in a single cycle, except for program branches, which require two cycles. A total of 35 instructions (reduced instruction set) are available. Additionally, a large register set gives some of the architectural innovations used to achieve a very high performance. The PIC16C63 devices have 22 I/O pins. Each device has 192 bytes of RAM. In addition, several peripheral features are available, including: three timer/ counters, two Capture/Compare/PWM modules, and two serial ports. The Synchronous Serial Port (SSP) can be configured as either a 3-wire Serial Peripheral Interface (SPI) or the two-wire Inter-Integrated Circuit (I2C) bus.
PIC16C63-20I/SP
The PIC16CXX is a family of low-cost, high-performance, CMOS, fully-static, 8-bit microcontrollers.
All PIC16/17 microcontrollers employ an advanced
RISC architecture. The PIC16CXX microcontroller family has enhanced core features, eight-level deep stack,
and multiple internal and external interrupt sources.
The separate instruction and data buses of the Harvard
architecture allow a 14-bit wide instruction word with
separate 8-bit wide data. The two stage instruction
pipeline allows all instructions to execute in a single
cycle, except for program branches (which require two
cycles). A total of 35 instructions (reduced instruction
set) are available. Additionally, a large register set gives
some of the architectural innovations used to achieve a
very high performance.
PIC16C710-20I/SP
The PIC16C71X is a family of low-cost, high-performance, CMOS, fully-static, 8-bit microcontrollers with
integrated analog-to-digital (A/D) converters, in the
PIC16CXX mid-range family.
All PIC16/17 microcontrollers employ an advanced
RISC architecture.The PIC16CXX microcontroller family has enhanced core features, eight-level deep stack,
and multiple internal and external interrupt sources.
The separate instruction and data buses of the Harvard
architecture allow a 14-bit wide instruction word with
the separate 8-bit wide data. The two stage instruction
pipeline allows all instructions to execute in a single
cycle, except for program branches which require two
cycles. A total of 35 instructions (reduced instruction
set) are available. Additionally, a large register set gives
some of the architectural innovations used to achieve a
very high performance.
PIC16C711 Microcontroller
The PIC16C711 is a low-cost, high-performance, CMOS, fully-static, 8-bit microcontrollers with integrated analog-to-digital (A/D) converters, in the PIC16C711 mid-range family. The separate instruction and data buses of the Harvard architecture allow a 14-bit wide instruction word with the separate 8-bit wide data. The two stage instruction pipeline allows all instructions to execute in a single cycle, except for program branches which require two cycles. A total of 35 instructions (reduced instruction set) are available. Additionally, a large register set gives some of the architectural innovations used to achieve a very high performance. PIC16C711 microcontrollers typically achieve a 2:1 code compression and a 4:1 speed improvement over other 8-bit microcontrollers in their class. The PIC16C711 devices have 36 bytes of RAM, the PIC16C711 has 68 bytes of RAM and the PIC16C715 has 128 bytes of RAM. Each device has 13 I/O pins. In addition a timer/counter is available. Also a 4-channel high-speed 8-bit A/D is provided.
PIC16C72A-04/SP
PIC16C733 Microcontroller
The PIC6C733 is a 8 Bit CMOS Microcontroller with A/D Converter and LIN-BUS Transceiver. The following are the features:-
??Four channel a-bit A/D converter
? 8-bit real clock/counter (TMRO) With 8-bit programmable prescaler
? Integrated LIN-BUS Transceiver
? Wake-up on Bus activity
? 12-V Battery operation for Transceiver
