25AA320-I/SN
₹60.00
The Microchip Technology Inc. 25AA320/25LC320/25C320 (25XX320*) serial Electrically Erasable PROMs are 32 Kbit. A basic Serial Peripheral Interface (SPI) compliant serial bus is used to access the memory. A clock input (SCK) is required, as well as separate data in (SI) and data out (SO) lines. A Chip Selection (CS) input controls access to the device. The hold pin allows you to suspend communication with the gadget (HOLD). Transitions on the device’s inputs will be ignored while it is stopped, excluding Chip Select, enabling the host to service higher priority interrupts.
Features
? CMOS Low-Power Technology:
– Maximum write current: 3 mA
– Typical read current: 500 A
– Typical standby current: 500 nA
? 4096 x 8 Bit Storage
? 32 bytes each page
? Maximum Write Cycle Time: 5 ms
? Erase and write cycles that are self-timed
? Write Block Protection:
– Protect none, 1/4, 1/2, or the entire array.
? Integrated Write Protection:
– Data protection circuitry that is switched on and off
? Latch for write enable
– A write-protection pin
? Read in Sequence
? High dependability:
– Endurance: 1 million E/W cycles
– Data retention: more than 200 years
– ESD protection: more than 4000V
? PDIP, SOIC, and TSSOP packages with 8 pins
? TSSOP Package with 14 Leads
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AT24C512C-SSHD Datasheet
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Features
Low and Standard Voltage Operation: 2.7 (VCC = 2.7 to 5.5 V) and 1.8 (VCC = 1.8 to 5.5 V)
?128 x 8, 256 x 8, 512 x 8, 1024 x 8, or 2048 x 8 internal organisation (16K)
Bidirectional Data Transfer Protocol, Schmidt Trigger, Filtered Inputs for Noise Suppression, Two-wire Serial Interface, and Compatibility at 100 kHz (1.8V) and 400 kHz (2.7V, 5V)
8-byte page (1K, 2K), 16-byte page, Write Protect Pin for Hardware Data Protection (4K, 8K, 16K) Writing Styles
?High-reliability? Endurance: 1 Million Write Cycles? Data Retention: 100 Years ?Partial Page Writes Allowed ?Self-timed Write Cycle (5 ms max)
?Automotive Grade and Lead-free/Halogen-free Devices Available
?5-lead SOT23,8-lead TSSOP,8-lead PDIP,8-lead JEDEC SOIC,8-lead MAP, and 8-ball dBGA2 Packages
?Die Sales: Bumped Wafers, Waffle Packs, and Wafer Forms
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Features
Low and Standard Voltage Operation: 2.7 (VCC = 2.7 to 5.5 V) and 1.8 (VCC = 1.8 to 5.5 V)
?128 x 8, 256 x 8, 512 x 8, 1024 x 8, or 2048 x 8 internal organisation (16K)
Bidirectional Data Transfer Protocol, Schmidt Trigger, Filtered Inputs for Noise Suppression, Two-wire Serial Interface, and Compatibility at 100 kHz (1.8V) and 400 kHz (2.7V, 5V)
8-byte page (1K, 2K), 16-byte page, Write Protect Pin for Hardware Data Protection (4K, 8K, 16K) Writing Styles
?High-reliability? Endurance: 1 Million Write Cycles? Data Retention: 100 Years ?Partial Page Writes Allowed ?Self-timed Write Cycle (5 ms max)
?Automotive Grade and Lead-free/Halogen-free Devices Available
?5-lead SOT23,8-lead TSSOP,8-lead PDIP,8-lead JEDEC SOIC,8-lead MAP, and 8-ball dBGA2 Packages
?Die Sales: Bumped Wafers, Waffle Packs, and Wafer Forms
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M25P40-VMN6TPB
Features of M25P40-VMN6TPB?
- ?4 Mbit of Flash memory
- ?2.3 V to 3.6 V single supply voltage
- ?SPI bus compatible serial interface
- ?75 MHz clock rate (maximum)
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- ?Sector Erase (512 Kbit) in 0.6 s (typical)
- ?Bulk Erase (4 Mbit) in 4.5 s (typical)
- ?Deep Power-down mode 1 ?A (typical)
- ?Hardware Write Protection: protected area size defined by three non-volatile bits (BP0, BP1 and BP2)
- ?Electronic signatures ? JEDEC standard two-byte signature (2013h) ? Unique ID code (UID) with 16 bytes read only, available upon customer request ? RES instruction, one-byte, signature (12h), for backward compatibility
- ?Packages ? RoHS compliant
- ?Automotive grade parts available
- Memory Size -
- Supply Voltage - Min: 2.3 V
- Supply Voltage - Max: 3.6 V
- Active Read Current - Max: 8 mA
- Interface Type: SPI
- Maximum Clock Frequency: 75 MHz
- Organisation: 512 k x 8
- Data Bus Width: 8 bit
- Timing Type: Synchronous
- Minimum Operating Temperature: - 40 C
- Maximum Operating Temperature: + 85 C
- Packaging: Reel / Cut Tape
- Memory Type: NOR
- Product Type: NOR Flash
- Speed: 75 MHz
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