ATMEGA128A-AU

ATmega128A is a low-power CMOS 8-bit microcontroller based on the AVR? enhanced RISC architecture. By executing powerful instructions in a single clock cycle, the ATmega128A achieves throughputs close to 1MIPS per MHz. This empowers system designer to optimize the device for power consumption versus processing speed.

Applications of ATMEGA128A-AU

Industrial, Automation & Process Control, Sensing & Instrumentation, Metering

ATmega128A provides the following features:

• High-performance, Low-power Atmel AVR 8-bit Microcontroller
• Advanced RISC Architecture

? 133 Powerful Instructions – Most Single-clock Cycle Execution

? 32 ? 8 General Purpose Working Registers + Peripheral Control

Registers

? Fully Static Operation

? Up to 16MIPS Throughput at 16MHz

? On-chip 2-cycle Multiplier

• High Endurance Non-volatile Memory segments

? 128Kbytes of In-System Self-programmable Flash program

memory

? 4Kbytes EEPROM

? 4Kbytes Internal SRAM

? Write/Erase cycles: 10,000 Flash/100,000 EEPROM

? Data retention: 20 years at 85?C/100 years at 25?C(1)

? Optional Boot Code Section with Independent Lock Bits

• In-System Programming by On-chip Boot Program
• True Read-While-Write Operation

? Up to 64 Kbytes Optional External Memory Space

? Programming Lock for Software Security

? SPI Interface for In-System Programming

• JTAG (IEEE std. 1149.1 Compliant) Interface

? Boundary-scan Capabilities According to the JTAG Standard

? Extensive On-chip Debug Support

ATmega103 and ATmega128A Compatibility
The ATmega128A is a highly complex microcontroller where the number of I/O locations supersedes the 64 I/O locations reserved in the AVR instruction set. To ensure backward compatibility with the ATmega103, all I/O locations present in ATmega103 have the same location in ATmega128A. Most additional I/O locations are added in an Extended I/O space starting from 0x60 to 0xFF, (that is, in the ATmega103 internal RAM space). These locations can be reached by using LD/LDS/LDD and ST/STS/STD instructions only, not by using IN and OUT instructions. The relocation of the internal RAM space may still be a problem for ATmega103 users. Also, the increased number of interrupt vectors might be a problem if the code uses absolute addresses. To solve these problems, an ATmega103 compatibility mode can be selected by programming the fuse M103C. In this mode, none of the functions in the Extended I/O space are in use, so the internal RAM is located as in ATmega103. Also, the Extended Interrupt vectors are removed.