ATTINY13SSU

32 general purpose working registers are combined with a robust instruction set in the AVR core. Due to the direct connection of all 32 registers to the Arithmetic Logic Unit (ALU), two separate registers may be accessed in a single instruction that is executed in a single clock cycle. While attaining throughputs up to 10 times quicker than traditional CISC microcontrollers, the resultant design is more code efficient. The following capabilities are offered by the ATtiny13A: 1K bytes of In-System Programmable Flash, 64 bytes of EEPROM, 64 bytes of SRAM, 6 general-purpose I/O lines, 32 general-purpose working registers, an 8-bit Timer/Counter with compare modes, Internal and External Interrupts, a 4-channel, 10-bit ADC, a programmable Watchdog Timer with internal Oscillator, and three software-selectable power-saving modes are all included. The CPU is turned off in idle mode, but the SRAM, Timer/Counter, ADC, Analog Comparator, and Interrupt system are still operational. All chip functions are disabled in the Power-down state until the next interrupt or hardware reset, which preserves the register values. To reduce switching noise during ADC conversions, the ADC Noise Reduction mode shuts down the CPU and all other I/O modules except for the ADC. High density non-volatile memory technology from Atmel is used in the creation of the product. Through an SPI serial interface, a traditional non-volatile memory programmer, an on-chip boot code running on the AVR core, or another method, the On-chip ISP Flash enables the Program memory to be reprogrammed In-System. A complete set of system and programmed development tools, including as C Compilers, Macro Assemblers, Program Debugger/Simulators, and Evaluation Kits, are available for the ATtiny13A AVR.