CD4030 types consist of four independent Exclusive-OR gates. THe CD4030 provides the system designer with a means for direct implementation of the Exclusive-OR function.
The CD4030 types are supplied in 14-lead hermetic dual-in-line ceramic packages (F3A suffix), 14-lead dual-in-line plastic packages (E suffix), 14-lead small-outline packages (M, MT, M96, and NSR suffixes), and 14-lead thin shrink small-outline packages (PW and PWR suffixes).
Features:-
- Medium-speed operation?tPHL, tPLH?= 65 ns (typ.) at VDD?= 10 V, CL?= 50 pF
- 100% tested for quiescent current at 20 V
- Standardized, symmetrical output characteristics
- 5-V, 10-V, and 15-V parametric ratings
- Maximum input current of 1 ?A at 18 V over full package-temperature range; 100 nA ? ? at 18 V and 25?C
- Noise margin (over full package-temperature range) =
1 V at VDD?= 5 V
2 V at VDD?= 10 V
2.5 V at VDD?= 15 V - Meets all requirements of JEDEC Tentative Standard No. 13B, “Standard Specifications for Description of ?B? Series CMOS Devices”
- Applications:
- Even and odd-parity generators and checkers
- Logical comparators
- Adders/subtractors
- General logic functions
Specifications:-
Parameter | Specification |
Part number | CD4030B |
Technology Family | CD4000 |
VCC (Min) (V) | 3 |
VCC (Max) (V) | 18 |
Channels (#) | 4 |
Inputs per channel | 4 |
IOL (Max) (mA) | 6.8 |
Input type | Standard CMOS |
IOH (Max) (mA) | -6.8 |
Output type | Push-Pull |
Features | Standard Speed (tpd > 50ns) |
Data rate (Max) (Mbps) | 8 |
Rating | See Data Sheet |
Operating temperature range (C) | -55 to 125 |
Package size: mm2:W x L (PKG) | 14PDIP: 181 mm2: 9.4 x 19.3 (PDIP|14) |
Package Group | PDIP|14 |
Related Document:-
* Product Images are shown for illustrative purposes only and may differ from actual product.