DS1225AD-85+
₹1,300.00
The DS1225AB and DS1225AD are 65,536-bit nonvolatile SRAMs that are structured as 8192 words by 8 bits. Each NV SRAM contains its own lithium energy source as well as control circuitry that constantly monitors VCC for out-of-tolerance conditions. When this occurs, the lithium energy source is automatically activated, and write protection is enabled permanently to avoid data corruption. The NV SRAMs can be used in place of conventional 8k ? 8 SRAMs that are directly compatible with the common byte wide 28-pin DIP standard. The devices also have the same pinout as the 2764 EPROM and 2864 EEPROM, allowing for direct replacement while improving performance. The amount of write cycles that can be performed is not limited, and no extra assistance circuitry is required for microprocessor connection.
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DS1225AB-200+
The DS1225AB and DS1225AD are 65,536-bit nonvolatile SRAMs that are structured as 8192 words by 8 bits. Each NV SRAM contains its own lithium energy source as well as control circuitry that constantly monitors VCC for out-of-tolerance conditions. When this occurs, the lithium energy source is automatically activated, and write protection is enabled unconditionally to avoid data corruption. The NV SRAMs can be used in place of existing 8k ? 8 SRAMs that are directly compatible with the common bytewide 28-pin DIP standard. The devices also have the same pinout as the 2764 EPROM and 2864 EEPROM, allowing for straightforward replacement while improving performance. The number of write cycles that can be performed is not limited, and no additional support circuitry is required for microprocessor connection.
DS1225AD-150+
The DS1225AB and DS1225AD are 65,536-bit nonvolatile SRAMs that are structured as 8192 words by 8 bits. Each NV SRAM contains its own lithium energy source as well as control circuitry that constantly monitors VCC for out-of-tolerance conditions. When this occurs, the lithium energy source is automatically activated, and write protection is enabled permanently to avoid data corruption. The NV SRAMs can be used in place of conventional 8k ? 8 SRAMs that are directly compatible with the common byte wide 28-pin DIP standard. The devices also have the same pinout as the 2764 EPROM and 2864 EEPROM, allowing for direct replacement while improving performance. The amount of write cycles that can be performed is not limited, and no extra assistance circuitry is required for microprocessor connection.
DS1225AD-200+
The DS1225AB and DS1225AD are 65,536-bit nonvolatile SRAMs that are structured as 8192 words by 8 bits. Each NV SRAM contains its own lithium energy source as well as control circuitry that constantly monitors VCC for out-of-tolerance conditions. When this occurs, the lithium energy source is automatically activated, and write protection is enabled permanently to avoid data corruption. The NV SRAMs can be used in place of conventional 8k ? 8 SRAMs that are directly compatible with the common byte wide 28-pin DIP standard. The devices also have the same pinout as the 2764 EPROM and 2864 EEPROM, allowing for direct replacement while improving performance. The amount of write cycles that can be performed is not limited, and no extra assistance circuitry is required for microprocessor connection.
DS1230Y-150+
The DS1230 256k Nonvolatile SRAMs have a capacity of 262,144 bits and are structured as 32,768 words by 8 bits. Each NV SRAM contains its own lithium energy source as well as control circuitry that constantly monitors VCC for out-of-tolerance conditions. When this occurs, the lithium energy source is automatically activated, and write protection is enabled unconditionally to avoid data corruption. The DS1230 DIP-package devices can be utilised in place of current 32k ? 8 static RAMs that directly comply to the common byte wide 28-pin DIP standard. The pinout of the DIP devices matches that of the 28256 EEPROMs, allowing for straightforward substitution while improving performance. The Low Profile Module package of DS1230 devices is specifically suited for surface-mount applications. There is no limit to the number of write cycles that can be performed.
DS1230Y-70+
The DS1230 256k Nonvolatile SRAMs have a capacity of 262,144 bits and are structured as 32,768 words by 8 bits. Each NV SRAM contains its own lithium energy source as well as control circuitry that constantly monitors VCC for out-of-tolerance conditions. When this occurs, the lithium energy source is automatically activated, and write protection is enabled unconditionally to avoid data corruption. The DS1230 DIP-package devices can be utilized in place of current 32k ? 8 static RAMs that directly comply to the common byte wide 28-pin DIP standard. The pinout of the DIP devices matches that of the 28256 EEPROMs, allowing for straightforward substitution while improving performance. The Low Profile Module package of DS1230 devices is specifically suited for surface-mount applications. There is no limit to the number of write cycles that can be performed.
DS1232 MicroMonitor Chip
DS1232 Micro Monitor? Chip monitors three vital conditions for a microprocessor: power supply, software execution, and external override. First, a precision temperature-compensated reference and comparator circuit monitors the status of VCC. When an out-of-tolerance condition occurs, an internal power fail signal is generated which forces reset to the active state. When VCC returns to an in-tolerance condition, the reset signals are kept in the active state for a minimum of 250 ms to allow the power supply and processor to stabilize.
The second function the DS1232 performs is push button reset control. The DS1232 debounces the push button input and guarantees an active reset pulse width of 250 ms minimum. The third function is a watchdog timer. The DS1232 has an internal timer that forces the reset signals to the active state if the strobe input is not driven low prior to timeout. The watchdog timer function can be set to operate on timeout settings of approximately 150 ms, 600 ms, and 1.2 seconds.
DS1232 Datasheet
DS12C887 IC – Real Time Clock (RTC) IC
RTC DS 12C887 is widely used to provide exact time and date in many applications such as x86 IBM PC. This RTC provides time components hour, minute and second in addition to the date/calendar components of year, month and day. This chip uses an internal lithium battery, which keeps the time and date updated even when the power is off. The DS12C887 works on CMOS technology to keep the power consumption low. It has a total of 128 bytes of non volatile RAM. It uses 14 bytes of RAM for storing the values of clock/calendar and control registers. The rest 114 bytes of RAM are for general purpose data storage.
The internal registers are accessible only when the RTC is powered by an external power source. When the external power is turned off, the RTC clock keeps running from the internal lithium battery source but the internal registers of the RTC cannot be accessed. RTC 12C887 becomes active when a voltage greater than 4.25V is applied and the internal registers can be accessed after 200 msec.
DS12C887+
The real-time clocks (RTCs) DS12885, DS12887, and DS12C887 are intended to be straight replacements for the DS1285 and DS1287. The devices have a real-time clock/calendar, one time-of-day alarm, three maskable interrupts with a shared interrupt output, a programmable square wave, and 114 bytes of battery-backed static RAM (113 bytes in the DS12C887 and DS12C887A). In a 24-pin enclosed DIP device, the DS12887 incorporates a quartz crystal and a lithium energy supply. At address 32h, the DS12C887 adds a century byte. For all devices, the end-of-month date is automatically modified for months with fewer than 31 days, including leap years. The devices can also be set to operate in 24-hour or 12-hour mode and have an AM/PM indicator. The status of VCC is monitored using a precision temperature-compensated circuit. If the primary power supply fails, the device immediately switches to a backup supply. When primary power is not available, a lithium coin-cell battery can be attached to the DS12885's VBAT input pin to keep the time and date running. The device is addressed via a multiplexed byte-wide interface that supports both Intel and Motorola modes of operation.
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