DS1230Y-120+
₹1,500.00
The DS1230 256k Nonvolatile SRAMs have a capacity of 262,144 bits and are structured as 32,768 words by 8 bits. Each NV SRAM contains its own lithium energy source as well as control circuitry that constantly monitors VCC for out-of-tolerance conditions. When this occurs, the lithium energy source is automatically activated, and write protection is enabled unconditionally to avoid data corruption. The DS1230 DIP-package devices can be utilized in place of current 32k ? 8 static RAMs that directly comply to the common byte wide 28-pin DIP standard. The pinout of the DIP devices matches that of the 28256 EEPROMs, allowing for straightforward substitution while improving performance. The Low Profile Module package of DS1230 devices is specifically suited for surface-mount applications. The number of write cycles that can be performed is not limited, and no extra assistance circuitry is required for microprocessor connection.
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DS1225AB-200+
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DS1225AD-150+
The DS1225AB and DS1225AD are 65,536-bit nonvolatile SRAMs that are structured as 8192 words by 8 bits. Each NV SRAM contains its own lithium energy source as well as control circuitry that constantly monitors VCC for out-of-tolerance conditions. When this occurs, the lithium energy source is automatically activated, and write protection is enabled permanently to avoid data corruption. The NV SRAMs can be used in place of conventional 8k ? 8 SRAMs that are directly compatible with the common byte wide 28-pin DIP standard. The devices also have the same pinout as the 2764 EPROM and 2864 EEPROM, allowing for direct replacement while improving performance. The amount of write cycles that can be performed is not limited, and no extra assistance circuitry is required for microprocessor connection.
DS1225AD-170+
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DS1225AD-85+
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DS1232 MicroMonitor Chip
DS1232 Micro Monitor? Chip monitors three vital conditions for a microprocessor: power supply, software execution, and external override. First, a precision temperature-compensated reference and comparator circuit monitors the status of VCC. When an out-of-tolerance condition occurs, an internal power fail signal is generated which forces reset to the active state. When VCC returns to an in-tolerance condition, the reset signals are kept in the active state for a minimum of 250 ms to allow the power supply and processor to stabilize.
The second function the DS1232 performs is push button reset control. The DS1232 debounces the push button input and guarantees an active reset pulse width of 250 ms minimum. The third function is a watchdog timer. The DS1232 has an internal timer that forces the reset signals to the active state if the strobe input is not driven low prior to timeout. The watchdog timer function can be set to operate on timeout settings of approximately 150 ms, 600 ms, and 1.2 seconds.
DS1232 Datasheet
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The internal registers are accessible only when the RTC is powered by an external power source. When the external power is turned off, the RTC clock keeps running from the internal lithium battery source but the internal registers of the RTC cannot be accessed. RTC 12C887 becomes active when a voltage greater than 4.25V is applied and the internal registers can be accessed after 200 msec.
DS1307 IC – Real Time Clock (RTC) IC
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NE555 Timer IC DIP-8 Package
The NE555 IC devices are precision timing circuits capable of producing accurate time delays or oscillation. In the time delay or monostable mode of operation, the timed interval is controlled by a single external resistor and capacitor network. In the a stable mode of operation, the frequency and duty cycle can be controlled independently with two external resistors and a single external capacitor. The threshold and trigger levels normally are two-thirds and one-third, respectively, of VCC. These levels can be altered by use of the control-voltage terminal. When the trigger input falls below the trigger level, the flip-flop is set, and the output goes high. If the trigger input is above the trigger level and the threshold input is above the threshold level, the flip-flop is reset and the output is low. The reset (RESET) input can override all other inputs and can be used to initiate a new timing cycle. When RESET goes low, the flip-flop is reset, and the output goes low. When the output is low, a low impedance path is provided between discharge (DISCH) and ground. The output circuit is capable of sinking or sourcing current up to 200 mA. Operation is specified for supplies of 5V to 15V. With a 5-V supply, output levels are compatible with TTL inputs.
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