PIC16F628A-I/P

The PIC12F509 device is low-cost, high-performance, 8-bit, fully-static, Flash-based CMOS micro controllers. They employ a RISC architecture with only 33 single-word/ single-cycle instructions. All instructions are single cycle (200 ?s) except for program branches, which take two cycles. The device deliver performance an order of magnitude higher than their competitors in the same price category. The 12-bit wide instructions are highly symmetrical, resulting in a typical 2:1 code compression over other 8-bit micro controllers in its class. The easy to use and easy to remember instruction set reduces development time significantly. It is equipped with special features that reduce system cost and power requirements. The Power-on Reset (POR) and Device Reset Timer (DRT) eliminate the need for external Reset circuitry. There are four oscillator configurations to choose from (six on the PIC16F505), including INTRC Internal Oscillator mode and the power-saving LP (Low-Power) Oscillator mode. Power-Saving Sleep mode, Watchdog Timer and code protection features improve system cost, power and reliability. The device is available in the cost-effective Flash programmable version, which is suitable for production in any volume. The customer can take full advantage of Microchip?s price leadership in Flash programmable micro controllers, while benefiting from the Flash programmable flexibility. It is supported by a full-featured macro assembler, a software simulator, an in-circuit emulator, a ?C? compiler, a low-cost development programmer and a full featured programmer. All the tools are supported on IBM? PC and compatible machines.

The PIC16C63A devices are low cost, high performance, CMOS, fully-static, 8-bit microcontrollers in the PIC16CXX mid-range family. All PIC? microcontrollers employ an advanced RISC architecture. The PIC16CXX microcontroller family has enhanced core features, eight-level deep stack and multiple internal and external interrupt sources. The separate instruction and data buses of the Harvard architecture allow a 14-bit wide instruction word with the separate 8-bit wide data. The two stage instruction pipeline allows all instructions to execute in a single cycle, except for program branches, which require two cycles. A total of 35 instructions (reduced instruction set) are available. Additionally, a large register set gives some of the architectural innovations used to achieve a very high performance. The PIC16C63 devices have 22 I/O pins. Each device has 192 bytes of RAM. In addition, several peripheral features are available, including: three timer/ counters, two Capture/Compare/PWM modules, and two serial ports. The Synchronous Serial Port (SSP) can be configured as either a 3-wire Serial Peripheral Interface (SPI) or the two-wire Inter-Integrated Circuit (I2C) bus.

The PIC16F684 is a 14-Pin Flash-Based, 8-Bit CMOS Microcontrollers with nano Watt Technology . The following are the features:- ??17 1/0 Pins and I Input-only Pin: - High current source/sink for direct LED drive - ?Interrupt-on-Change pin - ?Individually programmable weak pull-ups - Ultra Low-power Wake-up (LJLPWU) ? Analog Comparator Module With: - TWO analog comparators - Programmable on-chip voltage reference (CVREF) module (% of Voo) - Comparator inputs and outputs externally accessible - SR Latch mode - Timer I Gate Sync Latch - Fixed O.6VVREF ? AID Converter: ?ID-bit resolution and 12 channels ? Timer 8-Bit Timer/Counter With 8-Bit rammable Prescaler