PIC16F677-I/P PIC Microcontroller, 8051

The PIC12F509 device is low-cost, high-performance, 8-bit, fully-static, Flash-based CMOS micro controllers. They employ a RISC architecture with only 33 single-word/ single-cycle instructions. All instructions are single cycle (200 ?s) except for program branches, which take two cycles. The device deliver performance an order of magnitude higher than their competitors in the same price category. The 12-bit wide instructions are highly symmetrical, resulting in a typical 2:1 code compression over other 8-bit micro controllers in its class. The easy to use and easy to remember instruction set reduces development time significantly. It is equipped with special features that reduce system cost and power requirements. The Power-on Reset (POR) and Device Reset Timer (DRT) eliminate the need for external Reset circuitry. There are four oscillator configurations to choose from (six on the PIC16F505), including INTRC Internal Oscillator mode and the power-saving LP (Low-Power) Oscillator mode. Power-Saving Sleep mode, Watchdog Timer and code protection features improve system cost, power and reliability. The device is available in the cost-effective Flash programmable version, which is suitable for production in any volume. The customer can take full advantage of Microchip?s price leadership in Flash programmable micro controllers, while benefiting from the Flash programmable flexibility. It is supported by a full-featured macro assembler, a software simulator, an in-circuit emulator, a ?C? compiler, a low-cost development programmer and a full featured programmer. All the tools are supported on IBM? PC and compatible machines.

The PIC12F675 has a 13-bit program counter capable of addressing an 8K x 14 program memory space. The data memory is partitioned into two banks, which contain the General Purpose Registers and the Special Function Registers. The register file is organized as 64 x 8 in the PIC12F675 device. Each register is accessed, either directly or indirectly, through the File Select Register FSR. There are as many as six general purpose I/O pins available. Depending on which peripherals are enabled, some or all of the pins may not be available as general purpose I/O. In general, when a peripheral is enabled, the associated pin may not be used as a general purpose I/O pin.