PIC16F685-I/SP

The PIC12F508 from Microchip Technology is low-cost, high-performance, 8-bit, fully-static, Flash-based CMOS microcontroller. They employ a RISC architecture with only 33 single-word/single-cycle instructions. All instructions are single cycle (200 ?s) except for program branches, which take two cycles. The PIC12F508 device deliver performance an order of magnitude higher than their competitors in the same price category. The 12-bit wide instructions are highly symmetrical, resulting in a typical 2:1 code compression over other 8-bit microcontrollers in its class. The easy to use and easy to remember instruction set reduces development time significantly. The PIC12F508 microcontroller is equipped with special features that reduce system cost and power requirements. The Power-on Reset (POR) and Device Reset Timer (DRT) eliminate the need for external Reset circuitry. There are four oscillator configurations to choose from, including INTRC Internal Oscillator mode and the power-saving LP (Low-Power) Oscillator mode. Power-Saving Sleep mode, Watchdog Timer and code protection features improve system cost, power and reliability.

The PIC12F675 has a 13-bit program counter capable of addressing an 8K x 14 program memory space. The data memory is partitioned into two banks, which contain the General Purpose Registers and the Special Function Registers. The register file is organized as 64 x 8 in the PIC12F675 device. Each register is accessed, either directly or indirectly, through the File Select Register FSR. There are as many as six general purpose I/O pins available. Depending on which peripherals are enabled, some or all of the pins may not be available as general purpose I/O. In general, when a peripheral is enabled, the associated pin may not be used as a general purpose I/O pin.

The PIC16C711 is a low-cost, high-performance, CMOS, fully-static, 8-bit microcontrollers with integrated analog-to-digital (A/D) converters, in the PIC16C711 mid-range family. The separate instruction and data buses of the Harvard architecture allow a 14-bit wide instruction word with the separate 8-bit wide data. The two stage instruction pipeline allows all instructions to execute in a single cycle, except for program branches which require two cycles. A total of 35 instructions (reduced instruction set) are available. Additionally, a large register set gives some of the architectural innovations used to achieve a very high performance. PIC16C711 microcontrollers typically achieve a 2:1 code compression and a 4:1 speed improvement over other 8-bit microcontrollers in their class. The PIC16C711 devices have 36 bytes of RAM, the PIC16C711 has 68 bytes of RAM and the PIC16C715 has 128 bytes of RAM. Each device has 13 I/O pins. In addition a timer/counter is available. Also a 4-channel high-speed 8-bit A/D is provided.

  The PIC16F690 is a 20-Pin Flash-Based, 8-Bit CMOS Microcontrollers. The following are the features:- ??17 1/0 Pins and I Input-only Pin: - High current source/sink for direct LED drive - ?Interrupt-on-Change pin - ?Individually programmable weak pull-ups - Ultra Low-power Wake-up (LJLPWU) ? Analog Comparator Module With: - TWO analog comparators - Programmable on-chip voltage reference (CVREF) module (% of VDD) - Comparator inputs and outputs externally accessible - SR Latch mode - Timer I Gate Sync Latch - Fixed O.6VVREF ? AID Converter: ?ID-bit resolution and 12 channels ? Timer 8-Bit Timer/Counter With 8-Bit rammable Prescaler