PIC18F458-E/P

The PIC12F629 has a 13-bit program counter capable of addressing an 8K x 14 program memory space. The data memory is partitioned into two banks, which contain the General Purpose Registers and the Special Function Registers. The register file is organized as 64 x 8 in the PIC12F629 device. Each register is accessed, either directly or indirectly, through the File Select Register FSR. There are as many as six general purpose I/O pins available. Depending on which peripherals are enabled, some or all of the pins may not be available as general purpose I/O. In general, when a peripheral is enabled, the associated pin may not be used as a general purpose I/O pin.

The PIC16C63A devices are low cost, high performance, CMOS, fully-static, 8-bit microcontrollers in the PIC16CXX mid-range family. All PIC? microcontrollers employ an advanced RISC architecture. The PIC16CXX microcontroller family has enhanced core features, eight-level deep stack and multiple internal and external interrupt sources. The separate instruction and data buses of the Harvard architecture allow a 14-bit wide instruction word with the separate 8-bit wide data. The two stage instruction pipeline allows all instructions to execute in a single cycle, except for program branches, which require two cycles. A total of 35 instructions (reduced instruction set) are available. Additionally, a large register set gives some of the architectural innovations used to achieve a very high performance. The PIC16C63 devices have 22 I/O pins. Each device has 192 bytes of RAM. In addition, several peripheral features are available, including: three timer/ counters, two Capture/Compare/PWM modules, and two serial ports. The Synchronous Serial Port (SSP) can be configured as either a 3-wire Serial Peripheral Interface (SPI) or the two-wire Inter-Integrated Circuit (I2C) bus.

The PIC16F628A is 18-pin Flash-based members of the versatile PIC16F628A family of low-cost, high-performance, CMOS, fullystatic, 8-bit microcontrollers. All PIC? microcontrollers employ an advanced RISC architecture. The PIC16F628A have enhanced core features, an eight-level deep stack, and multiple internal and external interrupt sources. The separate instruction and data buses of the Harvard architecture allow a 14-bit wide instruction word with the separate 8-bit wide data. The two-stage instruction pipeline allows all instructions to execute in a single cycle, except for program branches (which require two cycles). A total of 35 instructions (reduced instruction set) are available, complemented by a large register set.

The PIC16F690 is a 8-bit Flash-based Microcontroller with A/D Controller and Enhanced Capture/Compare PWM . The following are the features:- ? Timer0: 8-bit timer/counter with 8-bit prescaler ? Timer1: 16-bit timer/counter with prescaler can be incremented during Sleep via external crystal/clock ? Timer2: 8-bit timer/counter with 8-bit period register, prescaler and postscaler ? Enhanced Capture, Compare, PWM module: - Capture is 16-bit, max. resolution is 12.5 ns - Compare is 16-bit, max. resolution is 200 ns - PWM maximum resolution is 10-bit - Enhanced PWM: - Single, Half-Bridge and Full-Bridge modes - Digitally programmable dead-band delay - Auto-shutdown/restart ? 8-bit multi-channel Analog-to-Digital Converter ? 13 I/O pins with individual direction control ? Programmable weak pull-ups on PORTB