8-bit Microcontrollers - MCU 3.5KB 128 RAM 22 I/O

The PIC16C63A devices are low cost, high performance, CMOS, fully-static, 8-bit microcontrollers in the PIC16CXX mid-range family. All PIC? microcontrollers employ an advanced RISC architecture. The PIC16CXX microcontroller family has enhanced core features, eight-level deep stack and multiple internal and external interrupt sources. The separate instruction and data buses of the Harvard architecture allow a 14-bit wide instruction word with the separate 8-bit wide data. The two stage instruction pipeline allows all instructions to execute in a single cycle, except for program branches, which require two cycles. A total of 35 instructions (reduced instruction set) are available. Additionally, a large register set gives some of the architectural innovations used to achieve a very high performance. The PIC16C63 devices have 22 I/O pins. Each device has 192 bytes of RAM. In addition, several peripheral features are available, including: three timer/ counters, two Capture/Compare/PWM modules, and two serial ports. The Synchronous Serial Port (SSP) can be configured as either a 3-wire Serial Peripheral Interface (SPI) or the two-wire Inter-Integrated Circuit (I2C) bus.

The PIC12F508 from Microchip Technology is low-cost, high-performance, 8-bit, fully-static, Flash-based CMOS microcontroller. They employ a RISC architecture with only 33 single-word/single-cycle instructions. All instructions are single cycle (200 ?s) except for program branches, which take two cycles. The PIC12F508 device deliver performance an order of magnitude higher than their competitors in the same price category. The 12-bit wide instructions are highly symmetrical, resulting in a typical 2:1 code compression over other 8-bit microcontrollers in its class. The easy to use and easy to remember instruction set reduces development time significantly. The PIC12F508 microcontroller is equipped with special features that reduce system cost and power requirements. The Power-on Reset (POR) and Device Reset Timer (DRT) eliminate the need for external Reset circuitry. There are four oscillator configurations to choose from, including INTRC Internal Oscillator mode and the power-saving LP (Low-Power) Oscillator mode. Power-Saving Sleep mode, Watchdog Timer and code protection features improve system cost, power and reliability.

The PIC16F873, PIC16F874, PIC16F876 and PIC16F877 are the four covered devices. Devices for the PIC16F876/873 and PIC16F877/874 available in 28-pin and 40-pin packages, respectively. On 28-pin devices, the Parallel Slave Port is not implemented. Each PIC16F87X device has the ability to access an 8K word block of program memory continuously. Only 11 bits of address are provided by the CALL and GOTO instructions, allowing branching inside any 2K program memory page. PCLATH4:3> provides the upper 2 bits of the address when performing a CALL or GOTO instruction. The user must make sure that the page choose bits are set when performing a CALL or GOTO instruction in order for the chosen programme memory page to be addressed. The full 13-bit PC is popped off the stack whenever a return from a CALL instruction (or interrupt) is performed. Therefore, the return instructions do not need the modification of the PCLATH4:3> bits (which POPs the address from the stack). Data Memory Organization The General Purpose Registers and Special Function Registers are divided up into several banks in the data memory. The bank select bits are bits RP1 (Status:6) and RP0 (Status:5). Each bank stretches to 7Fh (128 bytes). The Special Function Registers are only permitted in the bottom positions of each bank. General Purpose Registers, which are implemented as static RAM, are located above the Special Function Registers. Special Function Registers are present in all installed banks. For code reduction and faster access, some commonly used Special Function Registers from one bank may be duplicated in another bank.